SOC RTL Design Engineer, Hardware Compute Group Job at Amazon.com Services LLC, Sunnyvale, CA

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  • Amazon.com Services LLC
  • Sunnyvale, CA

Job Description

DESCRIPTION

Amazon Devices is an inventive research and development company that designs and develops high-profile devices like the Kindle family of products, Fire Tablets, Alexa, Fire TV, Amazon Echo, & Astro products. This is an exciting opportunity to join Amazon in developing its next generation SoCs for the machine learning-enabled consumer products. We are looking for exceptional engineers to join our SoC design team and help develop the next generation of chips based on a revolutionary architecture and to continue to innovate on behalf of our customers.

Work hard. Have Fun. Make history.

Key job responsibilities
In this role, you work in a team developing SoCs to be deployed in a range of Amazon devices. You will integrate industry standard and custom hardware IP and subsystems into SoCs to accelerate applications in machine learning, computer vision and robotics. You will work closely with System Architects, SoC architects, IP developers and physical design teams to develop SoCs that meets the power, performance and area goals for Amazon devices. You will design the interconnect, and automate the integration flow. You will help define the processes, methods and tools for design and implementation of large complex SoCs. Develop chip level and subsystem level netlists integrating IPs and new design.
- Work with Chip Architects to understand architecture and high-level product requirements.
- Convert Chip Spec into RTL using internal IPs and external IPs.
- Review Architecture and Design of custom IPs for integration into SoCs.
- Design & Develop RTL for Interconnects, Interfaces, Power Management, Clocking, Reset, Test & Debug.
- Develop and implement methodologies for I/O, DFT, Debug, Clocking and Power Management.

BASIC QUALIFICATIONS

- BS degree or higher in EE or CE or CS
- 3+ years or more of practical semiconductor design experience including full-chip and subsystem RTL integration
- Experience in micro-architecture definition from architecture guideline and model analysis
- Experience in RTL coding (Verilog/System Verilog) and debug, as well as performance/power/area analysis and trade-offs
- Experience in closing full-chip and subsystem timing working with synthesis and static timing analysis teams
- Excellent verbal and written communication skills, collaboration and teamwork skills as well as ability to contribute to diverse and inclusive teams

Job Tags

Full time,

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